The maximum clock frequency that can be achieved without violating internal setup (tSU) and hold (tH) time requirements. The Classic Timing Analyzer analyzes and reports fMAX following timing analysis.
You can specify the default required fMAX for a design in the Timing Analysis Settings page of the Settings dialog box. You can also specify the required fMAX of individual clock signals in a design by creating clock settings and assigning them to signals in the design.
The Timing Analyzer calculates fMAX with the following equation:
fMAX=1/(<register to register delay>-<clock skew delay>+<micro setup delay>+<micro clock to output delay>)
Clock skew delay is calculated with the following equation:
<clock to destination register delay>-<clock to source register delay>
Important: These settings apply only to classic timing analysis. For more information about TimeQuest timing analysis options, see About TimeQuest Timing Analysis.
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