An industry-standard I/O Buffer Information Specification (IBIS) file format for electronic behavioral specifications (with the extension .ibs) that is generated by the Quartus II software for performing board-level signal integrity verification of Altera devices with other EDA tools. An IBIS Output File contains IBIS models for the specific voltage, inductance, capacitance, and resistance values for the I/O pins in a specific Altera device.
You can direct the Compiler to generate an IBIS Output File after successful compilation by selecting IBIS in the Board-Level Signal Integrity Analysis section of the Board-Level page of the EDA Tool Settings dialog box. The Compiler places the generated IBIS Output File in the /<project directory>/board/ibis directory by default.
The file name of the IBIS Output File is the top-level design entity name with an .ibs extension and conforms to the IBIS version 3.2 standard. You can use the IBIS Output File for board-level simulation in the Mentor Graphics ICX Pro and HyperLynx, Cadence Allegro PCB SI, and Zuken CADSTAR and CR-5000 Lightning signal integrity verification tools.
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