An I/O standard used for high-speed I/O interfaces, LVDS (low-voltage differential signaling) uses differential inputs without a reference voltage. LVDS uses two wires carrying differential values to create a single channel. Two pins are required to determine the state of the signal.
The LVDS I/O standard uses a differential signal, an output (VCCIO) voltage of 2.5 V for the Cyclone, Cyclone II, Cyclone III, Stratix II, and Stratix III devices and 3.3 V for all other devices. The input and output buffers are determined by LVDS. The LVDS I/O standard is available for supported device(APEX 20KC, APEX 20KE, APEX II, Arria GX, Cyclone, Cyclone II, HardCopy II, HardCopy Stratix, Mercury, Stratix, Stratix II, Stratix II GX, and Stratix GX) families.
For detailed information, refer to the device family data sheet available from the Literature section of the Altera website.
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