Example of Creating a Verilog HDL Custom Variation of the lpm_ram_dq Function
The following example illustrates how to use the MegaWizard Plug-In Manager to create a custom megafunction variation of the lpm_ram_dq function. You can follow similar steps to create custom megafunction variations of other megafunctions. To create a custom megafunction variation for the lpm_ram_dq function:
On the Tools menu, click MegaWizard Plug-In Manager.
In response to Which action do you want to perform?, select Create a new custom megafunction variation and click Next.
In response to Which type of output file do you want to create?, select Verilog HDL.
In the Available Megafunctions list, click on the + icon to expand the storage folder and select LPM_RAM_DQ.
In response to What name do you want for the file?, type or browse to locate the appropriate file name or location. For this example, the path and file name should be C:\projects\use_lpm_ram_dq.v.
Click Next.
To specify the device and set the bus width and specify which ports to register:
In response to Create RAM for which device family?, select APEX20KE.
In response to How wide should the 'q' output bus be?, select 8 bits.
In response to How wide should the 'address' input bus be?, select 8 bits.
Click Next.
In response to Which ports should be registered?, turn on 'data' input port, 'address' input port, and 'q' output port.
Click Next.
To set the initial content of the memory, under Do you want to specify the initial content of the memory?, select No, leave it blank.
Click Next.
The Summary page informs you of the files that the MegaWizard Plug-In Manager creates. In this example, it creates the following files:
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