About Using the Encounter Conformal Software with the Quartus II Software
You can use the Cadence Encounter Conformal software to perform formal verification of a Synplicity Synplify-generated Verilog Quartus Mapping File (.vqm) and a corresponding post-fit Verilog Output File (.vo) generated by the Quartus II software.
The following topics describe the typical flow to perform formal verification using the Quartus II software and the Encounter Conformal software:
You can also use Quartus II Integrated Synthesis to synthesize a design and then perform an RTL to gate-level equivalence verification using the Encounter Conformal software. The Encounter Conformal software compares the RTL netlist (described in Verilog HDL or VHDL) to the Quartus II-generated gate-level, post-fit Verilog Output File for functional equivalence.