To achieve today’s time-to-market constraints, plan your FPGA I/O pins early in the design cycle. Planning involves understanding the FPGA's I/O capabilities and making I/O assignments and validating them against I/O rules. It also involves generating a pin out and importing the file into a board development tool.
This page provides support resources for:
For further technical support, go to mySupport, where you can create, view, and update service requests, including I/O planning and PCB design issues.
I/O Assignment and Analysis
For specific I/O rules and standards of Altera® FPGAs, refer to the selectable I/O standards chapter in the appropriate device handbook. Table 1 lists support resources to help you through the I/O planning process.
| Table 1. I/O Assignment Analysis Support Resources | |
| Resource | Description |
|---|---|
| I/O Management (PDF) | Chapter of the Quartus® II Handbook. Provides an FPGA I/O planning flow detailing how and when to use many I/O features available in the Quartus II software, including the Pin Planner, and the I/O Assignment Analysis command. |
| Pin-Out Files for Altera Devices | Provides a list of Altera device pin-out descriptions in various file formats. |
| I/O Navigator | Lets you quickly look up I/O specifications using the I/O Navigator. |
| Assignment Editor (PDF) | Describes how to use the Assignment Editor to make assignments, including I/O-related assignments. |
| SameFrame Pin-Out Design for FineLine® BGA Packages | Describes vertical and cross package migration for Altera FLEX® and MAX® devices. |
| Bus & I/O | Design examples. |
| Training Courses & Demonstrations | |
| Pin Planner (demo) | See a quick demonstration on Quartus II software's pin planner. |
| I/O Assignment Analysis (demo) | See a quick demonstration on Quartus II software's I/O assignment tools. |
PCB Design
In addition to the PCB design tool support in the Quartus II handbook, you can use the resources listed in Table 2 to help you through the PCB development process.
| Table 2. PCB Support Resources | |
| Resource | Description |
|---|---|
| Cadence PCB Design Tools Support (PDF) | Chapter of the Quartus II Handbook. Describes the design flow between Quartus II software and Cadence PCB design tools. |
| Mentor Graphics® PCB Design Tools Support (PDF) | Chapter of the Quartus II Handbook. Describes the design flow between Quartus II software and Mentor Graphics PCB design tools |
| Capture CIS Symbols | Provides symbol libraries for Cadence Capture CIS PCB tool (aka Orcad). |
| High-Speed Board Layout Guidelines (PDF) | Altera application note. |
| High-Speed Board Designs (PDF) | Altera application note. |
| Training Courses & Demonstrations | |
| FPGA to Board Design Flow Using Mentor Graphics Tools (tutorial) | This interactive tutorial presents the Quartus II design flow with third-party board-level tools to manage and transfer I/O assignments. |
