Basic Mode
Stratix® IV GX FPGAs, HardCopy® IV GX ASICs, Stratix II GX FPGAs, and Stratix GX FPGAs provide a complete solution for many industry-standard protocols and interfaces. However, several applications use and require proprietary functionality based on legacy system design or require functionality not offered by mainstream protocols.
For these applications the transceivers offer a basic mode, whereby the standard building blocks within the transceiver can be individually configured to meet your requirements. Alternatively, the blocks can be bypassed if the functionality is not required. Table 1 lists the basic modes available in Stratix IV GX, HardCopy IV GX, Stratix II GX, and Stratix GX devices together with a list of the transceiver physical coding sublayer (PCS) blocks available in this mode.
| Table 1. Stratix IV GX, HardCopy IV GX, Stratix II GX, and Stratix GX Modes |
| Transceiver Feature |
Stratix GX FPGAs |
Stratix IV GX, HardCopy IV GX, Stratix II GX Devices |
| Basic Mode |
Basic Single Width |
Basic Double Width |
| Data Rates (Gbps) |
0.500 - 3.1875 |
0.600 - 3.125 |
2.000 - 8.500
(2.000 - 7.000, HardCopy IV GX)
(2.000 - 6.375, Stratix II GX) |
| Basic Mode Channel Bonding |
No |
Yes |
Yes
(No, Stratix II GX) |
| Possible Reference Clock (MHz) |
25 - 650 |
50.0 - 622.08 |
50.0 - 622.08 |
| FPGA Bus Width (bits) |
8,10, 16, or 20 |
8, 10, 16, 20 |
16, 20, 32, 40 |
| 8B/10B Encode/Decode |
 |
|
|
| Dedicated Synchronization State Machine |
- |
- |
|
| Word Align |
|
|
|
| Rate Match |
- |
|
|
| Byte Serialize/ Deserialize |
|
|
|
| Phase Comp FIFO |
|
|
|
| Dynamic Reconfiguration |
(1) |
|
|
| Byte Ordering |
- |
- |
|
| Single Bit Slip |
|
|
|
Note:
- Limited to pre-emphasis, equalization, and VOD.
Tools
Basic mode is available as a transceiver configuration option within Quartus® II development software. Once selected, you are guided through configuration options for each of the available blocks. Collateral is also available to support the basic transceiver modes, including a generic characterization report, user guides, transceiver simulation models, and design kits for industry-standard PCB and layout simulation tools.
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