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Reduce System Costs by Integrating PCI Interface Functions

Get More With Integration - Solution

Primary Benefit
  • Cost reduction
Additional Benefits
  • Smaller board size
  • Obsolescence proof
  • Greater design flexibility
Standard ICs Integrated
  • PCI target interface ASSP

Many of today’s peripheral component interconnect (PCI) bus interfaces are implemented using an ASSP. However, the most common functions of PCI target interfaces can be implemented using CPLDs (example shown Figure 1), resulting in cost savings, added flexibility, and potential reductions in board space use. These benefits are readily available via complete, easy-to-use PCI interface solutions.

Figure 1: MAX II CPLD-Based PCI Interface Block Diagram

Figure 1. MAX II CPLD-based PCI Interface Block Diagram

Figure 1. MAX II CPLD-based PCI Interface Block Diagram in PDFView full detail (108 KB) 

Read the Reduce System Costs by Integrating PCI Interface Functions Into CPLDs White Paper (PDF)

Get more information about this solution.

 
Read the Reduce System Costs by Integrating PCI Interface Functions Into CPLDs White Paper

PCI Compiler: 32-bit Master/Target MegaCore® Function

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