DRAM
      简介
      DDR SDRAM
      DDR2 SDRAM
      DDR3 SDRAM
      RLDRAM II
      SDR SDRAM
  
 SRAM
      简介
      QDR I / QDR II
      ZBT/Nobl
  
 FPGA
      Cyclone III
      Cyclone II
      Stratix III
      Stratix II/Stratix II GX
  

Memory Solutions Center: RLDRAM and RLDRAM II

Driven predominantly by the needs of networking applications, a new type of DRAM optimized for low-latency access, RLDRAM, was developed. Most DRAM memory types need both a row and column phase on a multiplexed address bus to support full random access. RLDRAM supports a non-multiplexed address, saving bus cycles.

The multi-bank architecture in RLDRAM devices allows pipelined accesses. This means the row- and column-line lengths are smaller than in DRAM devices, reducing capacitance and improving access time. RLDRAM utilizes higher operating frequencies and uses the 1.8-V, High-Speed Transceiver Logic (HSTL) standard with DDR data transfer to provide a very high throughput.

RLDRAM II offers faster random access times, on-die termination, a delay-locked loop (DLL) for higher frequency operation, larger densities, wider data paths, and higher bus utilization compared with RLDRAM.

Altera offers complete system solutions, including technical collateral, software support, intellectual property (IP) cores, demo boards, and simulation models to help you successfully interface Altera® FPGAs with RLDRAM II memories. Table 1 lists RLDRAM II memory interface performance support in Altera FPGAs.

Table 1. Altera FPGA RLDRAM II Memory Interface Performance Support
Device RLDRAM II Interface Performance
Stratix® III 1600 Mbps SIO, 800 Mbps CIO (400 MHz)
Stratix II 1200 Mbps SIO, 600 Mbps CIO (300 MHz)
Stratix II GX 1200 Mbps SIO, 600 Mbps CIO (300 MHz)
HardCopy® II 1000 Mbps SIO, 500 Mbps CIO (250 MHz)
Stratix 400 Mbps (200 MHz)
Stratix GX 400 Mbps (200 MHz)

Technical Documentation

Altera offers technical collateral (shown in Table 2) that contains information on device support for RLDRAM II.

Table 2. RLDRAM II Technical Documentation
Device Handbooks Applicable
Device(s)
Stratix III Device Handbook:
External Memory Interfaces in Stratix III Devices (PDF) chapter
Stratix III
Stratix II Device Handbook:
External Memory Device Interfaces  (PDF) chapter
Using Selectable I/O Standards (PDF) chapter
Stratix II
Stratix/Stratix GX Device Handbook:
External Memory Device Interfaces (PDF) chapter
Using Selectable I/O Standards (PDF) chapter
Stratix/Stratix GX
White Papers Applicable
Device(s)
Selecting the Right High-Speed Memory Technology for Your System (PDF) All
User Guides Applicable
Device(s)
RLDRAM II Controller MegaCore Function User Guide (PDF) 

HardCopy II
Stratix II/Stratix II GX

Application Notes Applicable
Device(s)
AN 325: Interfacing RLDRAM II With Stratix II, Stratix, and Stratix GX Devices (PDF) Stratix II
Stratix/Stratix GX
Hardware Test Results Applicable
Device(s)
Hardware Test Results Stratix

Software Support and Tools

Altera offers software (shown in Table 3) that aids in the RLDRAM II memory interface design process.

Table 3. RLDRAM II Software Support and Tools
Feature Applicable Device(s)
TimeQuest Timing Analyzer All devices
IBIS Models for I/O Buffers Stratix
Stratix GX

Development Kits and Hardware Reference Platforms

Memory hardware reference platforms available from Altera are listed below in Table 4. The Gerber files, layout, termination recommendations, and signal integrity analysis information of these reference platforms are also available.

Table 4. RLDRAM II Development Kits and Hardware Reference Platforms
Board Name Vendor Contact Information
Stratix Memory Reference Platform for DDR and RLDRAM II Altera Contact Altera or local Altera FAE

Presentations and Articles

Current Altera articles and presentations about RLDRAM II are listed below in Table 5.

Table 5. RLDRAM II Articles
Articles Type of Resource Applicable Device(s)
Altera Offers First FPGA-Based Hardware Reference Platforms for DDR2, RLDRAM II, and QDRII Memories HTML Stratix series FPGAs

RDLRAM and RLDRAM II Memory Vendors

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